2uger / verilog_uart_hw

Verilog UART implementation with Vivado build scripts to test loopback on Xilinx Arty board

Repository from Github https://github.com2uger/verilog_uart_hw

cocotb uart verilog fpga hardware uart-verilog xilinx-fpga combinational-logic finite-state-machine

Tiny verilog UART implementation and scripts to run it on real hardware.

Real hardware(Xilinx Artix-35T FPGA):

Make sure Vivado in your $PATH variable and just run make build.
You will find your bit file in vivado_build/build/products.
After programming device, just connect cable to on-board micro-usb port.

Run tests:

python3 -m venv .venv
source .venv/bin/activate
pip install cocotb
make test
deactivate

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Verilog UART implementation with Vivado build scripts to test loopback on Xilinx Arty board

cocotb uart verilog fpga hardware uart-verilog xilinx-fpga combinational-logic finite-state-machine

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Language:Python 49.8%Language:Verilog 31.6%Language:Tcl 11.8%Language:Makefile 6.8%