qrouter

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vsdip / vsdflow
VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW takes control, RTL is synthesized (using Yosys).
rtl programmer vsdip semiconductor opensource synthesis yosys qflow magic graywolf qrouter netgen opentimer opensta blifffanout tcl physicaldesign static sta scripting-language
Language:Coq 11
vishnuvardhan-k / vsd-physical-design-using-open-source-tools
The repository shows the 5 - day wrokshop for beginners using open source tools like yosys, magic, opentimer, qrouter and the purpose of this repository is to provide a complete idea about the 5 - days workshop on VLSI SoC/Physical design using open source EDA tools.
qflow synthesis tkcon-window qflow-manager chip-area yosys vsd-iat ngspice qrouter opentimer layout
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vsdip / vsdflow