phase-detector

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lakshmi-sathi / avsdpll_1v8
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
pll clock-multiplier intellectual-property analog-circuit phase-detector charge-pump rtl2gds manufacturable ic asic
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lakshmi-sathi / avsdpll_1v8