digital-logic-design-lab

There are 0 repository under digital-logic-design-lab topic.

• Amey-Thakur / DIGITAL-LOGIC-DESIGN-AND-ANALYSIS-AND-DIGITAL-SYSTEM-LAB

  CSC302: Digital Logic Design and Analysis [DLDA] & CSL301: Digital System Lab [DS Lab] <Semester III>

  computer-scienceengineeringcomputer-engineeringdigital-logic-designdigital-logic-design-labdigital-systemsdigital-system-designdigital-systems-designtextbooksameythakurameymegasatish
  10

• SM2A / University_Projects

  🎓💻All of my projects at University of Tehran

  introduction-to-programmingadvanced-programmingdigital-logic-designdigital-logic-design-labcomputer-architectureuniversity-projectprobability-and-statisticsartificial-intelligencecompiler-designoperating-systemsignal-systemcadcomputer-graphicscomputer-networks
  8

• PashaBarahimi / Digital-Logic-Design-Lab-Experiments

  Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.

  fpgaradix-4baud-rateclock-generatordigital-logic-designdigital-logic-design-labfunction-generator
  Language:Verilog 5

• alirezahabib / sut-dldl

  Digital Logic Design Lab, Sharif University of Technology

  digital-logic-design-labsharif-university
  Language:TeX 2

• Shehab-Naga / VHDL-Exercises

  My work for the laboratory exercises provided by intel FPGAcademy (Digital Logic) during my internship at PyramidTech in Summer 2022.

  digital-logic-design-labfpgaquartustestbenchesvhdl
  Language:VHDL 2

• burhanahmed1 / BitCalculator

  BitCalculator is used for bitwise arithematic operations like addition, subtraction, multiplication etc.

  bitwise-arithmeticbitwise-operationsdigital-logic-designdigital-logic-design-labdigitallogicdesignlogicworks5
  1

• EarthAkkharawat / Vending-machine

  Built vending machine circuit using sequential logic design

  digital-logic-design-labsequential-logic
  1

• MisaghM / Digital-Logic-Design-Lab-Experiments

  Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.

  baud-rateclock-generatordigital-logic-designdigital-logic-design-labfpgafunction-generatorradix-4
  Language:Verilog 1

• Al-Shafi-Github / 7-Segment-Display-Using-Different-Gates

  This Project is about 7 segment display of an ID using Different Gates and Multiplexers,Decoders

  7-segment-display7-segment-display-moduledigital-logic-designdigital-logic-design-lab
  0

• FasiulAbedinKhan / EEE283-Lab-Project-ElectronicVotingMachine

  We have developed an Electronic Voting Machine designed to tally the votes of 60 individuals. In this setup, there are six candidates vying for positions.

  digital-logic-designdigital-logic-design-lablaboratoryprojectproteus
  0