mithro

litex

Build your hardware, easily!

symbolator

HDL symbol generator

LEF

DO NOT USE -- Horribly broken LEF parser created by Cadence

litex-all

OpenROAD-flow

OpenROAD example flow methodology

rsd

RSD: RISC-V Out-of-Order Superscalar Processor

subdomain-redirect

Surelog

System Verilog 2017 Pre-processor, Parser

yosys

Yosys Open SYnthesis Suite

chiselwatt

A tiny POWER Open ISA soft processor written in Chisel

choosealicense.com

A site to provide non-judgmental guidance on choosing a license for your open source project

gitiles

A simple browser for Git repositories.

icebreaker-litex-examples

Example litex Risc-V SOC and some example code projects in multiple languages.

klayout

KLayout Main Sources

licenseclassifier

A License Classifier

linux-on-litex-vexriscv

Linux on LiteX-VexRiscv

litex-boards

LiteX boards files

litex-buildenv

An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!

litex-conda

Conda build recipes for the toolchains needed by LiteX / MiSoC firmware

luna

a USB multitool + nMigen framework for monitoring, hacking, and developing USB devices (work in progress)

minerva

A 32-bit RISC-V soft processor

Pill

Skill language interpreter

prjtrellis

Documenting the Lattice ECP5 bit-stream format.

pull_request_auto_labeler

Automatically label Github pull requests based on elements of the PR title. Defaults to Jira style ticket code(PROJ-100) in PR title

slack-invite-automation

A tiny web application to invite a user into your slack team.

symbiflow-website

symbiflow-xc-fasm2bels

Library to convert a FASM file into BELs importable into Vivado.

UHDM

Universal Hardware Data Model

wasm3

🚀 The fastest WebAssembly interpreter

wishbone-utils

Utilities for working with a Wishbone bus in an embedded device