matt venn (mattvenn)

mattvenn

Geek Repo

Location:Valencia, Spain

Home Page:http://mattvenn.net

Twitter:@matthewvenn

Github PK Tool:Github PK Tool


Organizations
Dygmalab

matt venn's starred repositories

liberty74

A Fully Open-Source Verilog-to-PCB Flow

Language:PythonLicense:NOASSERTIONStargazers:10Issues:0Issues:0

Hdl21

Hardware Description Library

Language:PythonLicense:BSD-3-ClauseStargazers:56Issues:0Issues:0

tt07-basilisc-2816-cpu

Small 2-bit serial 8/16 bit CPU for Tiny Tapeout 7

Language:VerilogLicense:Apache-2.0Stargazers:1Issues:0Issues:0

manta

A configurable and approachable tool for FPGA debugging and rapid prototyping.

Language:PythonLicense:GPL-3.0Stargazers:98Issues:0Issues:0

bandgapReferenceCircuit

repository for a bandgap voltage reference in SKY130 technology

Language:PythonLicense:Apache-2.0Stargazers:25Issues:0Issues:0

tt06-sar

SAR ADC on tiny tapeout

Language:VerilogLicense:Apache-2.0Stargazers:29Issues:0Issues:0

Circuit-Designers-Etiquette

A set of rules and recommendations for analog and digital circuit designers.

License:Apache-2.0Stargazers:21Issues:0Issues:0

MuraxArduino

A version of f32c/arduino that works with the SpinalHDL Vexriscv Murax SoC

Language:CStargazers:13Issues:0Issues:0

spi-ram-emu

SPI RAM Emulation on Pico

Language:CLicense:BSD-3-ClauseStargazers:13Issues:0Issues:0

psytestbench

Electronics Testbench Automation Library

Language:PythonLicense:GPL-3.0Stargazers:22Issues:0Issues:0

IIC-OSIC-TOOLS

IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

Language:PythonLicense:Apache-2.0Stargazers:258Issues:0Issues:0
Language:Jupyter NotebookLicense:Apache-2.0Stargazers:51Issues:0Issues:0

IHP-Open-PDK

130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design

Language:HTMLLicense:Apache-2.0Stargazers:331Issues:0Issues:0

mpw1-bringup

Attempts at recovering SKY130 MPW-ONE chips (December 2020 // March 2022)

Language:Jupyter NotebookStargazers:4Issues:0Issues:0

ChristmasTreeController

Christmas tree controller (ASIC)

Language:VerilogLicense:Apache-2.0Stargazers:7Issues:0Issues:0

yosys-cmd-ref

Staging repo for Yosys command reference build. The contents of this repository are autogenerated from Yosys source.

Language:TeXStargazers:3Issues:0Issues:0

carbon1-sw

Bare-metal software for the Carbon1 RISC-V tape-out

Language:CLicense:MITStargazers:4Issues:0Issues:0

camlink

Fix color space list for Elgato Camlink devices

Language:CLicense:GPL-3.0Stargazers:71Issues:0Issues:0
Language:VerilogLicense:Apache-2.0Stargazers:10Issues:0Issues:0
Language:JavaScriptLicense:Apache-2.0Stargazers:7Issues:0Issues:0

nibblecpu

Proof of Concept to learn Amaranth as an entry effort for Supercon's RTL design competition

Language:PythonLicense:BSD-2-ClauseStargazers:10Issues:0Issues:0

vlsiffra

Create fast and efficient standard cell based adders, multipliers and multiply-adders.

Language:PythonLicense:Apache-2.0Stargazers:103Issues:0Issues:0

tinytapout0_rajarshi

snaking shiftreg for tinytapout

Language:VerilogLicense:Apache-2.0Stargazers:1Issues:0Issues:0

wokwi-lookup-table-generator

Generator for wokwi schematics that implement lookup tables in conjunctive normal form (CNF), i.e. with AND and OR gates

Language:PythonLicense:GPL-3.0Stargazers:5Issues:0Issues:0
Language:VerilogStargazers:1Issues:0Issues:0

tinytapeout-tinysoc

A tiny SoC for TinyTapeout

Language:VerilogLicense:Apache-2.0Stargazers:2Issues:0Issues:0

ibnalhaytham

32-bit RISC-V based processor with memory controler

Language:VerilogLicense:GPL-3.0Stargazers:15Issues:0Issues:0

GDS2WebGL

Translates GDSII into HTML/JS that can be viewed in WebGL-capable web browsers.

Language:PythonLicense:MITStargazers:45Issues:0Issues:0

ExperiarSoC

RISC-V SoC designed for the Efabless Open MPW Program

Language:VerilogLicense:Apache-2.0Stargazers:10Issues:0Issues:0
Language:VerilogLicense:Apache-2.0Stargazers:3Issues:0Issues:0