gogolB / EE175

EE 175 Senior Design. Multibaseline Stereo Camera

verilog xilinx vivado zynq ov7670 slam computer-vision stereo-vision matlab senior-design university-project university-course

Hardware

Camera Module: OV7670 w/ 16 pins FPGA board: Z-turn Board by MYIR with ARM Processor and Zynq7020 Additionally used the I/O cape extension FPGA Board: Neso Artix-7 Camera Module: OV2640 Compute Platform: nVidia Jetson TX2

Software

Xilinx Vivado Matlab Python OpenCV

About

EE 175 Senior Design. Multibaseline Stereo Camera

verilog xilinx vivado zynq ov7670 slam computer-vision stereo-vision matlab senior-design university-project university-course

MIT License

Languages

Language:C 36.0%Language:Verilog 31.7%Language:MATLAB 7.2%Language:Shell 6.6%Language:Python 5.0%Language:Tcl 3.9%Language:JavaScript 2.6%Language:Batchfile 2.1%Language:HTML 2.0%Language:VHDL 1.5%Language:Coq 0.6%Language:Stata 0.6%Language:Pascal 0.1%Language:Forth 0.1%Language:PureBasic 0.0%