Open Ended Project: Digital Systems Design Course, Spring 2024
Div: 4A
ECE Dept.
KLE Technological University
| Sr. No. | Name | Roll No. | USN |
|---|---|---|---|
| 1. | Samuel | 104 | 01FE22BEC025 |
| 2. | Shreyas | 106 | 01FE22BEC027 |
| 3. | Amol | 148 | 01FE23BEC430 |
This is a simple project that shows how to multiply two 8x8 matrixes in Verilog.
Repository from Github https://github.comSamuelbec025/Verilog-Matrix-Multiplier
Open Ended Project: Digital Systems Design Course, Spring 2024
Div: 4A
ECE Dept.
KLE Technological University
| Sr. No. | Name | Roll No. | USN |
|---|---|---|---|
| 1. | Samuel | 104 | 01FE22BEC025 |
| 2. | Shreyas | 106 | 01FE22BEC027 |
| 3. | Amol | 148 | 01FE23BEC430 |
This is a simple project that shows how to multiply two 8x8 matrixes in Verilog.