Tingyuan LIANG (zslwyuan)

zslwyuan

Geek Repo

Company:HKUST

Location:Hong Kong

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Tingyuan LIANG's starred repositories

taskflow

A General-purpose Task-parallel Programming System using Modern C++

Language:C++License:NOASSERTIONStargazers:9793Issues:248Issues:442

skywater-pdk

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

Language:PythonLicense:Apache-2.0Stargazers:2911Issues:151Issues:269

docker-wechat

DoChat is a Dockerized WeChat (盒装微信) PC Windows Client for Linux

Language:ShellLicense:Apache-2.0Stargazers:2230Issues:36Issues:188

mayo

3D CAD viewer and converter based on Qt + OpenCascade

Language:C++License:BSD-2-ClauseStargazers:1309Issues:56Issues:254

Kratos

Kratos Multiphysics (A.K.A Kratos) is a framework for building parallel multi-disciplinary simulation software. Modularity, extensibility and HPC are the main objectives. Kratos has BSD license and is written in C++ with extensive Python interface.

Language:C++License:NOASSERTIONStargazers:991Issues:55Issues:2254

isa-l

Intelligent Storage Acceleration Library

Language:CLicense:NOASSERTIONStargazers:929Issues:58Issues:161

OpenTimer

A High-performance Timing Analysis Tool for VLSI Systems

Language:VerilogLicense:NOASSERTIONStargazers:536Issues:47Issues:71

f4pga

FOSS Flow For FPGA

Language:PythonLicense:Apache-2.0Stargazers:342Issues:17Issues:44

USTC-RVSoC

An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC,包含一个简单且可扩展的外设总线。

Language:SystemVerilogLicense:GPL-3.0Stargazers:336Issues:13Issues:8

Digital-IDE

在vscode上的数字设计开发插件

Language:VerilogLicense:GPL-3.0Stargazers:312Issues:8Issues:84

constellation

A Chisel RTL generator for network-on-chip interconnects

Language:ScalaLicense:BSD-3-ClauseStargazers:156Issues:17Issues:36

meshview

Simple OpenGL mesh/point cloud viewer

polymer

Bridging polyhedral analysis tools to the MLIR framework

Language:C++License:MITStargazers:97Issues:9Issues:58

AMF-Placer

AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BRAM...)

Language:C++License:Apache-2.0Stargazers:89Issues:4Issues:11

p8g

👾 Precessing, also known as p8g, is a general-purpose 2D graphics library.

playground

chipyard in mill :P

libxd

A simple 2D graphics library for C++.

Language:C++License:LGPL-2.1Stargazers:67Issues:9Issues:7

vsdstdcelldesign

This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an openlane flow.

Language:VerilogLicense:Apache-2.0Stargazers:59Issues:7Issues:2

neural-ilt

Neural-ILT, An End-to-end Learning-based Mask Optimizer

Language:PythonLicense:NOASSERTIONStargazers:56Issues:7Issues:5

sketchpad

A simple rendering library to experiment with CG techniques in OpenGL.

Language:C++License:MITStargazers:50Issues:1Issues:3

ThermographyDemo

Thermography Android蓝牙串口 热成像 热力图

Language:JavaStargazers:30Issues:2Issues:0

SPRoute

A parallel global router using the Galois framework

Language:C++License:NOASSERTIONStargazers:25Issues:4Issues:1

sky130-hello-world

Minimal SKY130 example with self-checking LVS, DRC, and PEX

Language:ShellLicense:Apache-2.0Stargazers:24Issues:3Issues:2

cloc-action

GitHub Action to Count Lines of Code with https://github.com/AlDanial/cloc

Language:DockerfileLicense:UnlicenseStargazers:14Issues:3Issues:2
Language:PythonLicense:BSD-2-ClauseStargazers:8Issues:3Issues:2

AutoGrad

🎈 A C++ code generator for the automatic derivation of tensors with linear indexes. Implementation for the lesson Compiling Technology(2020 Spring, advised by Yun Liang) in Peking University.

Language:C++License:MITStargazers:7Issues:3Issues:4

Clock-Network-Designer

一种可自动综合且可多扇出配置的均衡型时钟树的设计优化方法

Language:C++Stargazers:6Issues:2Issues:0

cloc-badge-action

cloc-badge-action

Language:ShellStargazers:3Issues:1Issues:0