Tingyuan LIANG's starred repositories
skywater-pdk
Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
docker-wechat
DoChat is a Dockerized WeChat (盒装微信) PC Windows Client for Linux
USTC-RVSoC
An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC,包含一个简单且可扩展的外设总线。
Digital-IDE
在vscode上的数字设计开发插件
constellation
A Chisel RTL generator for network-on-chip interconnects
AMF-Placer
AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BRAM...)
playground
chipyard in mill :P
vsdstdcelldesign
This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an openlane flow.
neural-ilt
Neural-ILT, An End-to-end Learning-based Mask Optimizer
ThermographyDemo
Thermography Android蓝牙串口 热成像 热力图
sky130-hello-world
Minimal SKY130 example with self-checking LVS, DRC, and PEX
cloc-action
GitHub Action to Count Lines of Code with https://github.com/AlDanial/cloc
Clock-Network-Designer
一种可自动综合且可多扇出配置的均衡型时钟树的设计优化方法
cloc-badge-action
cloc-badge-action