Wataru030's starred repositories
rocket-chip
Rocket Chip Generator
riscv-mini
Simple RISC-V 3-stage Pipeline in Chisel
My-RISCV64-CORE-writing
一生一芯 , ysyx , npc . the repo of the YSYX project . a riscv-64 CPU . writing .
All-of-SystemVerilog
みんなのSystemVerilog
ritter-soc
a 4-pipeline riscv soc ( included core, periph), based with rv32im ,designed by verilog
homemade-riscv
『プログラマのためのFPGAによるRISC-Vマイコンの作り方』のサポート・リポジトリ
pygears_riscv
RISC-V processor implementation in PyGears
All-of-SystemVerilog
みんなのSystemVerilog