ustb-owl / Uranus

Uranus MIPS processor by MaxXing & USTB NSCSCC team

fpga verilog mips cpu risc

Uranus

Uranus is a project of MIPS processor written by MaxXing & USTB NSCSCC team.

License

Copyright (C) 2010-2018 MaxXing.

Copyright (C) 2018 USTB NSCSCC Team.

About

Uranus MIPS processor by MaxXing & USTB NSCSCC team

fpga verilog mips cpu risc

GNU General Public License v3.0

Languages

Language:Verilog 79.7%Language:Python 18.6%Language:Coq 1.7%