ultraembedded

riscv_soc

Basic RISC-V Test SoC

core_sdram_axi4

SDRAM controller with AXI4 interface

core_usb_host

Basic USB 1.1 Host Controller for small FPGAs

core_ft60x_axi

FTDI FT600 SuperSpeed USB3.0 to AXI bus master

core_audio

Audio controller (I2S, SPDIF, DAC)

core_dvi_framebuffer

Minimal DVI / HDMI Framebuffer

fat_io_lib

Small footprint, low dependency, C code implementation of a FAT16 & FAT32 driver.

core_soc

Basic Peripheral SoC (SPI, GPIO, Timer, UART)

usb_sniffer

High Speed USB 2.0 capture device based on miniSpartan6+

usb2sniffer

USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)

core_usb_fs_phy

USB Full Speed PHY

core_usb_uart

USB serial device (CDC-ACM)

riscv32_linux_from_scratch

RISC-V 32-bit Linux From Scratch

fpga_test_soc

A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)

riscv_sbc

A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.

core_ulpi_wrapper

ULPI Link Wrapper (USB Phy Interface)

minispartan6-audio

miniSpartan6+ (Spartan6) FPGA based MP3 Player

core_usb_sniffer

USB capture IP

cortex_m0_wrapper

Cortex-M0 DesignStart Wrapper

core_ram_tester

AXI-4 RAM Tester Component

armv6m-sim

Simple instruction set simulator for ARMv6-M (Cortex M0)

ecpix-5

Projects for the ECPiX-5 - a ECP5 FPGA board.

xc6_bus_pirate

XC6 Bus Pirate (FPGA based multi-tool)

riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

riscv-linux-prebuilt

RISC-V Linux prebuilt images

riscv-sw-test

opensbi

RISC-V Open Source Supervisor Binary Interface

riscv-compliance

u-boot

"Das U-Boot" Source Tree

xchange

Change part number or package in a Xilinx 7-series FPGA bitstream