rejunity / tt05-psg-ay8913

TinyTapeout submission with the AY-3-8913 a 3-voice programmable sound generator (PSG) chip from General Instruments.

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ASIC for AY-3-8913 PSG in Verilog for Tiny Tapeout 5

Modern replica of a classic AY-3-8913

This Verilog implementation is a replica of the classical AY-3-8913 programmable sound generator. With roughly a 1600 logic gates this design fits on a single tile of the TinyTapeout.

The main goals of this project are:

  1. closely replicate the behavior and eventually the complete design of the original AY-3-891x with builtin DACs
  2. provide a readable and well documented code for educational and hardware preservation purposes
  3. leverage the modern fabrication process

A significant effort was put into a thorough test suite for regression testing and validation against the original chip behavior.

ASIC

The ASIC for the AY-3-8913 replica is built using the open source Skywater 130nm PDK and is part of multi project TinyTapeout.

Using 130nm process this AY-3-8913 fits in 160x100 um. The design consist of roughly 1600 digital logic gates and of which 223 are data flip-flops storing 1 bit of data each. Logic takes 87% of the chip area. Total wire length is 30 mm!

Examine the layout of this chip in 3D!

Chip technical capabilities

  • 3 square wave tone generators
  • 1 noise generator
  • 1 envelope generator with 10 patterns
  • Capable to produce a range of waves typically from 122 Hz to 125 kHz, defined by 12-bit registers.
  • 16 different volume levels

Historical use of the AY-3-891x

The AY-3-891x family of programmable sound generators was introduced by General Instrument in 1978. Variants of the AY-3-891x were broadly used:

  • home computers: Amstrad CPC, Atari ST, Oric-1, Sharp X1, MSX, ZX Spectrum 128/+2/+3
  • game consoles: Intellivision, Vectrex
  • and arcade machines

The AY-3-891x chip family competed with the similar Texas Instruments SN76489.

The reverse engineered AY-3-8910 / AY-3-8914

This implementation would not be possible without the reverse engineered schematics and analysis done by lvd and based on decapped AY-3-8910 and AY-3-8914 chips!

Info

Compatible chips:

Computers that used AY-3-819x / YM2149

  • Atari ST, Intellivsion, Amstrad CPC, Oric-1, Colour Genie, MSX, ZX Spectrum 128

Reverse Engineering and chip decap images

Connect chip to the speaker

There are several ways to connect this chip to the microcontroller and speaker.

One option is to connect off the shelf data parallel Digital to Analog Converter (DAC) for example Digilent R2R Pmod to the output pins and route the resulting analog audio to piezo speaker or amplifier.

Another option is to use the Pulse Width Modulated (PWM) AUDIO OUT pin with OpAmp+capacitor based integrator or capacitor based low-pass filter and a speaker:

  uController             AY-3-8913
  ,---------.            ,---._.---. 
  |         |    2 Mhz ->|CLK  SEL0|<-- 0
  |    GPIOx|----------->|BC1  SEL1|<-- 0
  |    GPIOx|----------->|BDIR     |
  |    GPIOx|----------->|D0       |
  |    GPIOx|----------->|D1       |
  |    GPIOx|----------->|D2       |          C1
  |    GPIOx|----------->|D3       |     ,----||----.
  |    GPIOx|----------->|D4       |     |          | 
  |    GPIOx|----------->|D5       |     |  OpAmp   |        Speaker     
  |    GPIOx|----------->|D6  AUDIO|     |   |\     |            /|
  |    GPIOx|----------->|D7   OUT |-----.---|-\    |   C2   .--/ |
  `---------'            `---------'         |  }---.---||---|    |
                                          ,--|+/             `--\ |
                                          |  |/               |  \|
                                          |                   |
                                     GND ---             GND ---  

Externally configurable clock divider

SEL1 SEL0 Description Clock frequency
0 0 Standard mode, clock divided by 8 1.7 .. 2.0 MHz
1 1 -----//----- 1.7 .. 2.0 MHz
0 1 New mode for TT05, no clock divider 250 .. 500 kHZ
1 0 New mode for TT05, clock div. 128 25 .. 50 MHz

Implementations

Music playback!

What is Tiny Tapeout?

TinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip.

To learn more and get started, visit https://tinytapeout.com.

Verilog Projects

Edit the info.yaml and uncomment the source_files and top_module properties, and change the value of language to "Verilog". Add your Verilog files to the src folder, and list them in the source_files property.

The GitHub action will automatically build the ASIC files using OpenLane.

How to enable the GitHub actions to build the ASIC files

Please see the instructions for:

Resources

What next?

About

TinyTapeout submission with the AY-3-8913 a 3-voice programmable sound generator (PSG) chip from General Instruments.

License:Apache License 2.0


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