Ross Daly's starred repositories

mlir

"Multi-Level Intermediate Representation" Compiler Infrastructure

circt

Circuit IR Compilers and Tools

Language:C++License:NOASSERTIONStargazers:1595Issues:255Issues:2013

xls

XLS: Accelerated HW Synthesis

Language:C++License:Apache-2.0Stargazers:1166Issues:64Issues:1241

gemmini

Berkeley's Spatial Array Generator

Language:ScalaLicense:NOASSERTIONStargazers:740Issues:30Issues:180

sail

Sail architecture definition language

Language:IsabelleLicense:NOASSERTIONStargazers:579Issues:34Issues:296

devito

DSL and compiler framework for automated finite-differences and stencil computation

Language:PythonLicense:MITStargazers:549Issues:32Issues:580

calyx

Intermediate Language (IL) for Hardware Accelerator Generators

Language:RustLicense:MITStargazers:467Issues:17Issues:797

cascade

A Just-In-Time Compiler for Verilog from VMware Research

Language:C++License:NOASSERTIONStargazers:433Issues:30Issues:129

findiff

Python package for numerical derivatives and partial differential equations in any number of dimensions.

Language:PythonLicense:MITStargazers:417Issues:10Issues:57

rohd

The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.

Language:DartLicense:BSD-3-ClauseStargazers:367Issues:15Issues:227

RapidWright

Build Customized FPGA Implementations for Vivado

Language:JavaLicense:NOASSERTIONStargazers:282Issues:27Issues:247

mockturtle

C++ logic network library

Language:C++License:MITStargazers:193Issues:18Issues:71

rsyn-x

Rsyn – An Extensible Physical Synthesis Framework

ahaHLS

An open source high level synthesis (HLS) tool built on top of LLVM

Language:C++License:MITStargazers:114Issues:17Issues:5

duh

👾 Design ∪ Hardware

Language:JavaScriptLicense:Apache-2.0Stargazers:73Issues:59Issues:66

hgdb

Hardware generator debugger

Language:C++License:BSD-2-ClauseStargazers:69Issues:6Issues:48

pono

Pono: A flexible and extensible SMT-based model checker

Language:C++License:NOASSERTIONStargazers:67Issues:7Issues:46

kitty

C++ truth table library

Language:C++License:MITStargazers:46Issues:9Issues:3

evoapproxlib

Library of approximate arithmetic circuits

Language:VerilogLicense:MITStargazers:45Issues:8Issues:2

lorina

C++ parsing library for simple formats used in logic synthesis and formal verification

Language:C++License:MITStargazers:35Issues:6Issues:11

rv_asm

RISC-V Assembler

Language:CLicense:MITStargazers:4Issues:2Issues:1

Build-18-FPGATetris

We will build Tetris using logic design concepts (Hardware threads, 18-240 Lab 3b) on an Altera FPGA.

Language:Standard MLStargazers:3Issues:0Issues:0

magma-session-types-experiments

Experiments with adding session types for hardware using magma

Language:PythonStargazers:3Issues:2Issues:0

fillomino

Two SMT-based Fillomino solvers

Language:PythonStargazers:3Issues:1Issues:0
Language:C++Stargazers:2Issues:5Issues:0

units_library_talk

FlashG About Units of Measurement

Language:PythonStargazers:1Issues:0Issues:0

js_games

Some JavaScript games

Language:JavaScriptLicense:MITStargazers:1Issues:3Issues:0