llvm / circt

Circuit IR Compilers and Tools

https://circt.org

llvm/circt Issues

CFToHandshake header depends on Transforms but doesn't actually ensure the dependency is built
Closed 2 months ago2
[firrtl] extmodules with HasBlackBoxInline instantiated only in a layer not emitted into layers location
Closed 2 months ago
[FIRRTL] Parser is using lookupSymbol when it could compute a SymbolTable once and re-use it.
Closed 2 months ago
[OM] parsing depend on the ordering of Class
Updated 2 months ago5
[SV] SVExtractTestCode not Extracting Assert Properties
Closed 2 months ago
[Comb] Missed optimization opportunity for multiply used boolean operations
Updated 2 months ago
[Arc] Add basic assertion support
Updated 2 months ago15
[FIRRTL] LowerMemory change in #6719 leads to ambiguous targets in EmitOMIR
Updated 2 months ago1
Wiring problem error with const source and non-const sink w/no-ref-type option
Closed 2 months ago
[FIRRTL][CheckCombLoops] Missing RWProbeOp support, crashes
Updated 2 months ago1
[HGLDD] Emit HW struct and array types
Updated 2 months ago
[Comb][Canonicalize] Missing best effort dialect attribute propagation
Closed 2 months ago1
[CI] LLVM Rebuild configuration suddenly broken?
Closed 2 months ago2
[FIRRTL] Add back owning module constraint for local targets after removing use of ExtractInstances
Updated 2 months ago
[FIRRTL] Lint XMRs in the "Design"
Updated 2 months ago
[LLHD] Empty llhd.proc assertion failure
Closed 2 months ago1
[FIRRTL] Add folders for IntegerMulOp
Updated 2 months ago5
[Ibis] Uses of replaceAllUsesWith in DialectConversion can no longer replace uses in replaced/erased ops.
Closed 2 months ago3
[Ibis] Update direct uses of replaceAllUsesWith.
Updated 2 months ago
[FIRRTL] Change FIRRTL Parser to Require Commas
Updated 2 months ago
[SV] Emit macro declarations for all referenced macros
Closed 3 months ago
[FIRRTL] Generate filelist for each public module
Updated 3 months ago2
[ImportVerilog] Make AST traveral non-recursive
Updated 3 months ago
[FIRRTL] Memories incorrectly placed in testbench directory
Closed 3 months ago
[FIRRTL] Generate Layer Collateral For All Public Modules
Updated 3 months ago
[HGLDD] Uniquify object names during emission
Closed 3 months ago
[HGLDD] Don't access instance ports as hierarchical path
Closed 3 months ago
[FIRRTL] Correct bindfile output for layers
Closed 3 months ago2
[ImportVerilog] Rename `Context` to `Converter`
Updated 3 months ago
[FIRRTL] Infer Widths Unbreakable Loop Checking Performance Issues
Updated 3 months ago
[FIRRTLToHW] Conversion failure of invalidated wire of clock type
Updated 3 months ago1
[Documentation] circt.llvm.org has not been updated
Closed 3 months ago4
[firtool] Allow specialization of layers
Updated 3 months ago
[FIRRTL] Add folders for IntegerShrOp
Updated 3 months ago
[FIRRTL] Remove "ref foo is <string>" syntax
Updated 3 months ago3
[FIRRTL] Lower Layers Needs To Update HierPathOps
Closed 3 months ago
[ESI] Ditch Capnp and replace it with Protobuf/gRPC
Updated 3 months ago1
[FIRRTL] Produce Better Error Message For Incorrect Enum FIRRTL Text
Updated 3 months ago1
[FIRRTL] Enum expressions of type UInt<0> fail to parse
Closed 3 months ago
[HW] Module port accessors and modifiers bugs
Updated 3 months ago4
[FIRRTL] Failure with Nightly Chisel re: layers
Closed 3 months ago3
[FIRRTL] Reconsider use of inferReturnType in FIRRTLExprs
Updated 3 months ago
[FIRRTL] Add folders for IntegerAddOp
Updated 3 months ago
[FIRRTL] Reject hierarchical paths on `EICG_wrapper` in `LowerIntrinsics`
Updated 3 months ago2
[TCL] TCL Bindings Fail to Link
Updated 3 months ago1
[ImportVerilog] Preprocessor ignores singleUnit option
Closed 3 months ago1
FSM HWInstanceOp must be used in SymbolTable or stop being a Symbol
Closed 3 months ago
Seq.hlmem cannot define a symbol and be placed in an hw.module. It must use inner symbols
Closed 3 months ago1
HW TypeScopeOp must be used in SymbolTable or stop being a Symbol.
Closed 3 months ago2
Calyx ControlOp must be a SymbolTable to embed FSM MachineOp
Closed 3 months ago1