plkpiotr / reconfigurable

Introduction to reconfigurable computing in Verilog [2018]

Digital electronics classes from Zybo

Software stack

• Vivado 2017.4
• Visual Studio Code 1.22.2

Table of contents

01 - Diodes and switches:

• led_button.v

02 - Cascade of AND gates:

• gates.v
• tb_gates.v

03 - Counter modulo:

• counter.v
• tb_counter.v

04 - Complex logical module:

• complex.v
• tb_complex.v

05 - Delay line:

• delay.v
• tb_delay.v

06 - Mysterious module:

• mysterious.v
• tb_mysterious.v

07 - State machine*:

• input.txt
• machine.v
• output.txt
• tb_machine.v

08 - Ready-made OR gate:

• lut.txt
• or_gate.m
• tb_or_gate.v

09 - Simple arithmetic:

• delay.v
• simple.v
• tb_simple.v
• tm_simple.m

Comments

The asterisk indicates that the module needs improvment or adding additional files.

License

MIT