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oransimhony
/
harvey
A simple RISCV32UI core written in Verilog
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risc-v
riscv
riscv-core
riscv-cpu
riscv32
riscv32i
verilog
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A simple RISCV32UI core written in Verilog
risc-v
riscv
riscv-core
riscv-cpu
riscv32
riscv32i
verilog
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Language:
SystemVerilog
89.1%
Language:
Shell
6.6%
Language:
Python
4.3%