muhammadaldacher / Modeling-of-4-bit-Flash-ADC-and-4-bit-DAC

This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs to construct the 4-bit ADC based on the flash architecture. Models are built in Cadence using ideal components & VerilogA blocks, & Analysis is done on Matlab.

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Modeling-of-4-bit-Flash-ADC-and-4-bit-DAC

This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs to construct the 4-bit ADC based on the flash architecture. Models are built in Cadence using ideal components & VerilogA blocks, & Analysis is done on Matlab.

Ideal Comparator

Ideal_Comparator_w

Ideal Clocked Comparator

Ideal_ClockedComparator_w

4-bit Flash ADC

1- To create the Thermometer-Code Output, ((2^4)-1) Comparators & (2^4) voltage levels created by the resistive ladder are used. Ideal_LadderAndComparators_w 2- To Convert the Thermometer-Code to a Binary-Code Output, a ROM Encoder is placed after the Comparators. Ideal_ThermoToBinary_w 3- The whole flash ADC: Ideal_FlashADC_w

4-bit DAC

Ideal_DAC_4bit_w

System Testbench

TB_Flash_Ideal_w

-> Using VerilogA blocks:
VerilogA_Testbench_w


To analyze the output results:


References:

My project on google drive:
https://drive.google.com/drive/folders/1W9ip4MpMZNf3IQsoFQkhgg6QaUya4Yp4
EE288 Lecture Notes:
https://drive.google.com/drive/folders/12Qqfw_TX1i7dvVVYXksaSdHV4gth1OD5
Videos on how to create VerilogA blocks for ADCs: https://drive.google.com/drive/folders/1GAobRzzFTkD6ywqSdDJUsO5g2C06hh_i
https://www.youtube.com/channel/UC7jwESeWKLcRbtxHwFS3A7Q/videos

About

This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs to construct the 4-bit ADC based on the flash architecture. Models are built in Cadence using ideal components & VerilogA blocks, & Analysis is done on Matlab.


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Language:MATLAB 100.0%