micro-FPGA / engine-V

SoftCPU/SoC engine-V

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engine-V

Documentation will be updated, the contest entry was done to keep the deadline, the documenation in readme was done in the last hours and was kept to bare minimum to get things compiled and tested.

Files are pushed, but readme comes just before deadline... it did come 1:30 before.

https://riscv.org/2018contest/ the above weblink has become 404 and is not saved by web.archive either, bummer!

readme.pdf was pushed to this repo on 26 November at 22:29 PST ahead of contest deadline and was done so in good faith it is part of the contest entry

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SoftCPU/SoC engine-V

License:Apache License 2.0


Languages

Language:Verilog 77.3%Language:FreeBasic 12.1%Language:Batchfile 4.2%Language:Pascal 4.1%Language:C++ 1.1%Language:Python 0.8%Language:Tcl 0.2%Language:VHDL 0.2%