[FIRRTLToHW] Conversion failure of invalidated wire of clock type

[Schuyler Eldridge]

The following fails verification after circt-opt -lower-firrtl-to-hw:

firrtl.circuit "Foo" {
  firrtl.module private @Foo() {
    %a = firrtl.wire : !firrtl.clock
    %b = firrtl.invalidvalue : !firrtl.clock
    firrtl.strictconnect %a, %b : !firrtl.clock
  }
}

This fails with:

Titan.mlir:4:10: error: 'hw.bitcast' op result #0 must be Type wherein the bitwidth in hardware is known, but got '!seq.clock'
    %b = firrtl.invalidvalue : !firrtl.clock
         ^
Titan.mlir:4:10: note: see current operation: %2 = "hw.bitcast"(%0) : (i1) -> !seq.clock

The illegal MLIR being produced is:

"builtin.module"() ({
  "hw.module"() ({
    %0 = "hw.constant"() {value = false} : () -> i1
    %1 = "hw.wire"(%2) {name = "a"} : (!seq.clock) -> !seq.clock
    %2 = "hw.bitcast"(%0) : (i1) -> !seq.clock
    "hw.output"() : () -> ()
  }) {comment = "", module_type = !hw.modty<>, parameters = [], per_port_attrs = [], result_locs = [], sym_name = "Foo", sym_visibility = "private"} : () -> ()
}) : () -> ()

[Schuyler Eldridge]

While LowerToHW shouldn't fail, it is also unexpected to see an invalid value at LowerToHW. This should have been converted to a special constant zero during SFCCompat, but it was not. 🤔