lipaul's starred repositories
yolov2_xilinx_fpga
A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard
python_for_image_processing_APEER
https://www.youtube.com/playlist?list=PLHae9ggVvqPgyRQQOtENr6hK0m1UquGaG
syclacademy
SYCL Academy, a set of learning materials for SYCL heterogeneous programming
FPGA_DisplayPort
An implementation of DisplayPort protocol for FPGAs
colour-demosaicing
CFA (Colour Filter Array) demosaicing algorithms for Python
data-parallel-CPP
Source code for 'Data Parallel C++: Mastering DPC++ for Programming of Heterogeneous Systems using C++ and SYCL' by James Reinders, Ben Ashbaugh, James Brodman, Michael Kinsner, John Pennycook, Xinmin Tian (Apress, 2020).
fpga-drive-aximm-pcie
Example designs for FPGA Drive FMC
PTXprofiler
A simple profiler to count Nvidia PTX assembly instructions of OpenCL/SYCL/CUDA kernels for roofline model analysis.
axi_vip_master
Sample UVM code for axi ram dut
HLS-Tiny-Tutorials
This is forked from Xilinx HLS-Tiny-Tutorial. I'm learning HLS and adding Verilator testbench to verify the generated RTL
zcu104_ubuntu
A project to demonstrate Xilinx MPSOC running Ubuntu
openai-cookbook
Examples and guides for using the OpenAI API
PP4FPGAs-Lab
Codes for PP4FPGAs labs
PP4FPGA_HLS
high level synthesis
CFU-Playground
Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM).
Pynq-Accelerator
A easy general acc.
yolov2_xilinx_fpga
A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard
RISC-V-On-PYNQ
RISC-V Integration for PYNQ