elfmedy

imgui

Dear ImGui: Bloat-free Graphical User interface for C++ with minimal dependencies

CnC_Remastered_Collection

TobudOS

开放原子开源基金会孵化的物联网操作系统，捐赠前为腾讯物联网终端操作系统TencentOS Tiny

exercise

exercise for nndl

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

ejoy2d

A 2D Graphics Engine for Mobile Game

wujian100_open

IC design and development should be faster，simpler and more reliable

eBooks

eBook分享大集合：主要以IT领域经典书籍收藏，以备不时之需。

riscv

RISC-V CPU Core (RV32IM)

nnom

A higher-level Neural Network library for microcontrollers.

swerv_eh1

A directory of Western Digital’s RISC-V SweRV Cores

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

ChaZD

ChaZD 查字典，简洁易用的英汉字典Chrome扩展程序，支持划词哦:)

USTC-RVSoC

An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。

EyerissF

An Eyeriss Chip (researched by MIT, a CNN accelerator) simulator and New DNN framework "Hive"

K210_Tutorial

K210基础入门教程 edit by Kyle阿凯

cv_learning_resnet50

Reindeer

PulseRain Reindeer - RISCV RV32I[M] Soft CPU

libGDL

一个移动端跨平台的gpu+cpu并行计算的cnn框架(A mobile-side cross-platform gpu+cpu parallel computing CNN framework)

pulp-nn

Maix-EMC

Maix-EMC: Embedded Model Convertor, convert NN model for embedded systems

poyo-v

Open source RISC-V IP core for FPGA/ASIC design

StarEngine

Crossplatform C++11 2D Game Engine for Windows and Android games

Convolutional-Neural-Network-Accelerator

Deep learning accelerator for convolutional layer (convolution operation) and fully-connected layer(matrix-multiplication).

CPU

《CPU自制入门》源码

mips-cpu

The Verilog implementation of five-stage-pipelined MIPS CPU (Classic RISC pipeline)

toy-cpu

hisi-driverlibs

dirverlibs for hi3716c board

VERILOG-CNN-mnist-system

本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件，并在 ARM＋FPGA 完成项目部署，实现通过摄取图片并通过 ARM＋FPGA 综合部署和加速识别算法，并通过显示驱动，在显示屏上显示摄像头原图和识别结果。