Siddharth13s / RISC-V_Synthesis_and_Physical_Design

Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo

cts floorplanning physical-design placement routing synopsys-dc synopsys-iccii synthesis tcl-scripts verilog powerplanning

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Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo

cts floorplanning physical-design placement routing synopsys-dc synopsys-iccii synthesis tcl-scripts verilog powerplanning

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Language:Verilog 48.5%Language:Tcl 45.4%Language:RenderScript 4.4%Language:HCL 1.7%