JorisPellereau

riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC

verilog-ethernet

Verilog Ethernet components for FPGA implementation

neorv32

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

verilog-axi

Verilog AXI components for FPGA implementation

openFPGALoader

Universal utility for programming FPGA

verilog-pcie

Verilog PCI express components

drawio-libs

Libraries for draw.io

verilog-axis

Verilog AXI stream components for FPGA implementation

gtg

Getting Things GNOME! trunk

tvip-axi

AMBA AXI VIP

XilinxTclStore

Xilinx Tcl Store

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

uvm_axi

uvm AXI BFM(bus functional model)

VHDL_Lib

Library of VHDL components that are useful in larger designs.

neoTRNG

🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

LCInterlocking

FreeCAD module to create laser cut interlocking parts.

ogame-opensource

This is revived OGame v 0.84 with old design.

cli

CLI for WaveDrom

Quine-McCluskey

Implementation of Quine McCluskey algorithm in Python 3

clear

bobsmods

Factorio mods by Bobingabout

Clock-Domain-Crossing-Synchronizers

Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference for understanding and implementing robust clock domain crossing solutions in digital systems.

systemverilog-homework

SystemVerilog language-oriented exercises

verilator_xilinx

Re-coded Xilinx primitives for Verilator use

getting-started-with-fpgas

Verilog and VHDL for book

cocotb-vivado

Limited python / cocotb interface to Xilinx/AMD Vivado simulator.

MajorityJudgment

Php class for Majority Judgment

pysct

Python wrapper for Xilinx's XSCT/XSDB console

Socket_Audio_Streaming_usingPython

Audio Streaming on localhost or internet using Python Socket Programming

Booth_Multipliers

Parameterized Booth Multiplier in Verilog 2001