wallento

wavedrompy

WaveDrom compatible python command line

riscv-python-model

Python Model of the RISC-V ISA

cocotbext-wishbone

cocotbext-uart

UART cocotb module

riscv-cocotb

cocotb infrastructure for RISC-V core testing

sungrow-websocket

Python Library to acees the websocket interface of Sungrow inverters

pipeline-viewer

CPU Pipeline Viewer

OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

esp-idf

Espressif IoT Development Framework. Official development framework for Espressif SoCs.

fossi-research

home-assistant.io

:blue_book: Home Assistant User documentation

ibex

Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.

opentitan

OpenTitan: Open source silicon root of trust

riscv-isa-sim

Spike, a RISC-V ISA Simulator

brands

🎨 Brands for Home Assistant

chipwhisperer

ChipWhisperer - the complete open-source toolchain for side-channel power analysis and glitching attacks

CircuitVerse

CircuitVerse Primary Code Base

core

:house_with_garden: Open source home automation that puts local control and privacy first.

gfmpw-1

glabs

Manage GitLab for Labs from the Command Line

riscv-platform-specs

RISC-V Profiles and Platform Specification

starter-hugo-academic

🎓 Hugo Academic Theme 创建一个学术网站. Easily create a beautiful academic résumé or educational website using Hugo, GitHub, and Netlify.

tt02-4bit-microprozessor-hoffmann

TT02: 4 bit microprocessor from the Hoffmann book "Grundlagen der Technischen Informatik" (German)

tt03-test-invert

vagrant

Vagrant is a tool for building and distributing development environments.

wallento.github.io

wallento.github.io.old

wamr-freertos

wasm-drone

wasm-micro-runtime

WebAssembly Micro Runtime (WAMR)