wallento

orconf-archive

OpenRISC Conference Website (archived)

wasm-micro-runtime

WebAssembly Micro Runtime (WAMR)

wamr-freertos

wasm-drone

gfmpw-1

cocotbext-wishbone

opentitan

OpenTitan: Open source silicon root of trust

sungrow-websocket

Python Library to acees the websocket interface of Sungrow inverters

wallento.github.io

pipeline-viewer

CPU Pipeline Viewer

wavedrompy

WaveDrom compatible python command line

tt03-test-invert

ibex

Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.

fossi-research

tt02-4bit-microprozessor-hoffmann

TT02: 4 bit microprocessor from the Hoffmann book "Grundlagen der Technischen Informatik" (German)

wallento.github.io.old

starter-hugo-academic

🎓 Hugo Academic Theme 创建一个学术网站. Easily create a beautiful academic résumé or educational website using Hugo, GitHub, and Netlify.

riscv-platform-specs

RISC-V Profiles and Platform Specification

glabs

Manage GitLab for Labs from the Command Line

core

:house_with_garden: Open source home automation that puts local control and privacy first.

riscv-python-model

Python Model of the RISC-V ISA

riscv-isa-sim

Spike, a RISC-V ISA Simulator

riscv-cocotb

cocotb infrastructure for RISC-V core testing

chipwhisperer

ChipWhisperer - the complete open-source toolchain for side-channel power analysis and glitching attacks

esp-idf

Espressif IoT Development Framework. Official development framework for Espressif SoCs.

vagrant

Vagrant is a tool for building and distributing development environments.

OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

home-assistant.io

:blue_book: Home Assistant User documentation

brands

🎨 Brands for Home Assistant

CircuitVerse

CircuitVerse Primary Code Base