vowstar

PicoGate

A tiny FPGA core module based on GW1NZ-LV1, CH552 and SLG46580

uC-OS3

µC/OS-III is a preemptive, highly portable, and scalable real-time kernel. Designed for ease of use on a huge number of CPU architectures.

mayo

3D CAD viewer and converter based on Qt + OpenCascade

riscv_em

Simple risc-v emulator, able to run linux, written in C.

gvbasic-simulator4cpp

GVBASIC Simulator C++ Version

ventus-gpgpu

GPGPU processor supporting RISCV-V extension, developed with Chisel HDL

PROBE_SMT_AutoCell

PROBE3.0

mediapipe

Cross-platform, customizable ML solutions for live and streaming media.

RF-design-of-2.4-GHz-LNA

This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.

Analog-design-of-10-GbaseKR-high-speed-serial-link-transceiver-in-65-nm-CMOS

This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.

Analog-Design-of-Asynchronous-SAR-ADC

This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) implemented in 45nm CMOS technology.

Layout-Design-of-an-8x8-SRAM-array

The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout design is done using Cadence Virtuoso’s ADE, & the Static Noise Margin is obtained through Matlab scripts.

Analog-Design-of-1.9-GHz-PLL-system

This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.

cbag

A C++ VLSI circuit schematic and layout database library

sdram

An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different manufacturers and models through parameter configuration.

FPGA-USB-Device

An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

FPGA-FOC

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器，用于驱动BLDC/PMSM电机。

FPGA-CAN

An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

FPGA-Gzip-compressor

FPGA-based GZIP (deflate) compressor. Input raw data and output standard GZIP format (as known as .gz file format). 基于FPGA的GZIP压缩器。输入原始数据，输出标准的GZIP格式，即常见的 .gz / .tar.gz 文件的格式。

FPGA-SDcard-Reader-SPI

An FPGA-based SD-card reader via SPI bus, which can read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器(通过SPI总线)，可以从FAT16或FAT32格式的SD卡中读取文件。

FPGA-SDcard-Reader

An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。

FPGA-NFC

Build an NFC (RFID) card reader using FPGA and simple circuit instead of RFID-specfic chip. 用FPGA+分立器件电路搭建一个NFC(RFID)读卡器，不需要专门的RFID芯片。

FPGA-PNG-decoder

An FPGA-based PNG image decoder, which can extract original pixels from PNG files. 基于FPGA的PNG图像解码器，可以从PNG文件中解码出原始像素。

FPGA-ftdi245fifo

FPGA-based USB fast data transmission using FT232H/FT600 chip. 使用FT232H/FT600芯片进行FPGA与电脑之间的高速数据传输。

FPGA-JPEG-LS-encoder

An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码器，可实现高压缩率的无损/近无损图像压缩。

webdfu

WebUSB Device Firmware Upgrade example

iob-lib

Verilog Modules and Python Scripts for Creating IP Core Build Directories

map

Modeling Architectural Platform

sod

An Embedded Computer Vision & Machine Learning Library (CPU Optimized & IoT Capable)