siriusm46

caravel_sirius

caravel_sirius_chip

https://caravel-user-project.readthedocs.io

memory

Single Port RAM, Dual Port RAM, FIFO

MENP

Multipole Expansion for NanoPhotoncis

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

Sampler_XADC

This is my implementation of a Sampler using the ARTY A7 35T developement board by Digilent.

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

mystic_mpw5

core-v-docs

Documentation for the OpenHW Group's set of CORE-V RISC-V cores

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

RISC-V-MYTH-Workshop

5 days (30 hours) is all what took me to learn the basics and design a pipelined RV32I core. Check this article to know more !

darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

tutorial

This is a tutorial we are using for Django Girls workshops

openpiton

The OpenPiton Platform

riscv

RISC-V CPU Core (RV32IM)

computer-science

:mortar_board: Path to a free self-taught education in Computer Science!

siriusm46

Heyyo! I am Hicret enthusiastic learner!

rust

Empowering everyone to build reliable and efficient software.

open-source-fpga-resource

A list of resources related to the open-source FPGA projects

STM32-base

A simple start for any STM32 based project.

Data-Structures-in-C

This repo contains example codes for data structures in C language.

verilog-math

Mathematical Functions in Verilog

bluepill-serial-monster

USB to 3 Port Serial (UART) adapter firmware for STM32 Blue Pill.

core-v-verif

Functional verification project for the CORE-V family of RISC-V cores.

hawk

Tutorial for making an ARM dev board in KiCAD

verilog-ethernet

Verilog Ethernet components for FPGA implementation

awesome-robotic-tooling

Tooling for professional robotic development in C++ and Python with a touch of ROS, autonomous driving and aerospace: https://freerobotics.tools/

iverilog

Icarus Verilog

LM-RISCV-DV

An Open-Source Design and Verification Environment for RISC-V

tdc-fpga

A Time to Digital Converter designed for Xilinx 7-Series FPGAs