sethm / verilog_mfm

MFM decoder written in Verilog

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Verilog MFM Decoder

This project contains an extermely sketchy and very experimental MFM decoder module written in Verilog.

It's really not ready yet.

Building

This should build reasonably well on any UNIX-like system. Possibly even Windows, if you're brave. I haven't tried. You'll need Icarus Verilog (http://iverilog.icarus.com/) to compile it. The default Makefile also wants to build a graph using gnuplot, so grab that too.

License

The MIT License (MIT)

Copyright (c) 2014 Seth Morabito

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

About

MFM decoder written in Verilog


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Language:Verilog 74.9%Language:Python 17.9%Language:Gnuplot 4.4%Language:Makefile 2.8%