Jiuyang Liu's repositories
chisel-circt-binder
The Chisel Convert Phase implemented with JVM Panama
rocket-test
RISC-V Core Test Framework
PLCT-Weekly
软件所PLCT实验室在开源领域的不定期简报
t1-DRAMsim3
DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator
ventus-gpgpu
GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
firrtl-spec
The specification for the FIRRTL language
ha-core
:house_with_garden: Open source home automation that puts local control and privacy first.
Language:PythonApache-2.0000
nixos-apple-silicon
Resources to install NixOS bare metal on Apple Silicon Macs
riscv-opcodes
RISC-V Opcodes
riscv-v-spec
Working draft of the proposed RISC-V V vector extension
tvip-axi
AMBA AXI VIP
Language:SystemVerilogApache-2.0000