patel-soham / interrupt-controller

A project to implement and test interrupt controller using Questasim software.

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

Interrupt Controller

A project to implement and test interrupt controller using Questasim software.

  • Design and Testbench made using Verilog.
  • Supports programming priorities for each device using Advanced Peripheral Bus(APB) protocol by master.
  • Developed testbench with various test cases to verify controller working when programmed for different priorities.

Files

  1. Verilog

About

A project to implement and test interrupt controller using Questasim software.


Languages

Language:Verilog 98.5%Language:Stata 1.5%