This repository contains the source code for a complete, FPGA based hardware implementation of a Network Time Protocol (NTP) server. The implementation includes hardware support for Network Time security (NTS).
The server implements the complete network stack in hardware, which allows high performance, low latency and low jiter. The design supports scalability through parallel, independent network engines.
The directory [FPGA/targets] contains the implementations of the NTP/NTS server "ntps" on different FPGA platforms. The currently supported platforms are:
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Xilinx VC709 Connectivity Kit. A reference board with a Virtex 7 XC7VX690T FPGA device.
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Xilinx VCU-118 Evaluation Kit. A reference board with a Virtex Ultrascale+ VU9P FPGA.
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Arista 7130-48LB FPGA Switch. A Layer 1+ switch with a Virtex Ultrascale+ VU9P FPGA.
Look at README.md in the respective target directories for more information on how to build and deploy an FPGA image for the different platforms. The VC709 project has the most complete instructions on how to use it, the VCU118 project lacks documentation on how to set up the hardware, but is is fairly similar.
The design is complete, verified and tested in real hardware and systems. The server is used to operate the Swedish Distributed Time Service.