This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Power / (fs*2ENOB).
- The focus in the preamp design was to be fast, more than to have a very high gain, since the regenerative latch provides the huge gain.
- The ideal current source & Mcx are used to provide the biasing for Mc (current mirror) so the overdrive voltage of Mc wonβt take much of the headroom, while providing good gain & speed.
- Cc1 & Cc2 are coupling capacitors that can be used for offset cancellation & blocks the DC level from the Preamp stage.
- The transmission gates cause the inputs & outputs of the back-to-back inverters to reset to VDD/2 during the latch-reset phase. This speeds up the regeneration during the latch-regenerating phase.
- The RS latch stage is for the comparator to maintain the sampled & regenerated value when the latch output is reset.
- The input-inverters of the RS latch block are sized to move the invertersβ switching threshold point such that an input of 0.9V (during latch-reset phase) is considered high, thus causing the output-inverters to maintain the received information.
Ideally, How the switches & the coupling capacitors work:
During clk = 1:π_πΆππ = π_πΆπ β π_πΌπDuring clk = 0:
π_π = π_πΆππ_π = π_πΆππ + π_π ππ = π½_πͺπ΄ β (π½_π°π΅ β π½_πΉππ)
π_πn = π½_πͺπ΄ β (π½_π°π΅n β π½_πΉππn)
π_πp = π½_πͺπ΄ β (π½_π°π΅p β π½_πΉππp)
πin(to_Preamp) = π_πp - π_πn = β (π½_π°π΅p β π½_πΉππp) + (π½_π°π΅n β π½_πΉππn) = 2 * (π½_π°π΅n β π½_πΉππn)
In this test, We want to find the smallest difference between Vin_p & Vin_n that the Comparator can detect (give the right output value), & this tells us the resolution of this comparator at this frequency.
-> My project on google drive:
https://drive.google.com/drive/folders/1W9ip4MpMZNf3IQsoFQkhgg6QaUya4Yp4
-> EE288 Lecture Notes:
https://drive.google.com/drive/folders/12Qqfw_TX1i7dvVVYXksaSdHV4gth1OD5
-> Check our paper:
M. Aldacher, M. Nasrollahpour, S. Hamedi-Hagh, βA low-power, high-resolution, 1 GHz differential comparator with low-offset and low-kickbackβ, 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Year: 2017, Pages: 310 β 313.
-> Video: "How Clocked Comparators work?"
https://www.youtube.com/watch?v=u1_9_BL5NjI