mbekmyrz

sim

Verilog Simulation

newsrec

News Recommendation Model using GNN

Vitis-Tutorials

Vitis In-Depth Tutorials

mbekmyrza.github.io

log_merger

Tool to merge log files

hornn

naizagai

Web-site of the Naizagai team

imas

imas task

micropack

Scripts for the Micropackets Project

lstm

Scripts for the LSTM project

max-finder

Vivado Project for finding the maximum number in an input sequence of 32-bit usigned integers.Custom IP

max-number-finder

IC Design Project in Verilog.

max-frequency-finder

Maximum frequency finder in sequential circuit with elementary logic gates and memory elements ("Flip-Flops").

quine-mccluskey

The Quine-McCluskey Method.

minesweeper

Java implementation of the Minesweeper Game.

scheduling

School Timetable Generation Program.

floorplanning

FPGA Floorplanning Project

hash-code-2020

Books: Google Hash Code 2020!