lorentsinani / 16bitCPU-Verilog

16 bit CPU created in Vivado with Verilog

16bitCPU-Verilog

16 bit CPU created in Vivado with Verilog, this was a project in Architecture of Computers subject, FIEK.

Language

Project is developed in Verilog.

Confidential

This project is developed from the authors below with full rights, u can take it use it but at least leave credit for us!

Authors

Lorent Sinani

Era Kadiri

Meriton Kryeziu

Lorik Mustafa

Aridon Krasniqi