myrtle's repositories
nextpnr-xilinx
Experimental flows using nextpnr for Xilinx devices
nextpnr-xilinx-meta
Metadata for the nextpnr-xilinx xc7 flow
one_hot_fpga_gf180
FPGA with a custom SRAM+mux bitcell for onehot routing
prjoxide-db
prjoxide database
fabulous_mpd
Example digital project for the Efabless Caravel "openframe" harness
fabulous_mpw0gf
fabulous efpga tapeout on gf180
litex-boards
LiteX boards files
FABulous
Fabric generator and CAD tools
mapnik
Mapnik is an open source toolkit for developing mapping applications
one-hot-fpga-gf180-3x3
3x3 variant to be less demanding on precheck
OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
openstreetmap-carto
A general-purpose OpenStreetMap mapnik style, in CartoCSS
picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
pythondata-cpu-cv32e40p
Python module containing system_verilog files for cv32e40p cpu (for use with LiteX).
riscv-dbg
RISC-V Debug Support for our PULP RISC-V Cores
sky130_klayout_pdk
Skywaters 130nm Klayout PDK