L2 Cache memory access time?
YiminGao0113 opened this issue · comments
Yimin Gao commented
I am integrating a core into LiteX and want to determine the necessity of L1 Cache integration.
My question is:
In the L2 cache in LiteDRAM, what is the memory access time if there is a cache hit? and what is the time for a cache miss?
Thanks!