eimon96 / VHDL

vhdl vhdl-code vhdl-coursework vhdl-testbench logic-gates

Basic logic gates implementations using

VHDL Simili 3.1 (Symphony EDA Sonata 3.1)

(win64)

Furthermore:

D Flip Flop-schematic:

T Flip Flop-schematic:

https://www.multisim.com/contributors/574827-eimon96/

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vhdl vhdl-code vhdl-coursework vhdl-testbench logic-gates

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