arjunrajasekharan / 16bit-Sklansky-Adder

16-bit Slansky Adder design using verilog HDL

gtkwave iverilog sklansky-adder testbench verilog vlsi

About

16-bit Slansky Adder design using verilog HDL

Reference Circuit

Output

Test Bench

GTK Waveform

About

16-bit Slansky Adder design using verilog HDL

gtkwave iverilog sklansky-adder testbench verilog vlsi

MIT License

Languages

Language:Verilog 96.9%Language:Coq 3.1%