Anupama's starred repositories
freeCodeCamp
freeCodeCamp.org's open-source codebase and curriculum. Learn to code for free.
learn-regex
Learn regex the easy way
dive-into-machine-learning
Free ways to dive into machine learning with Python and Jupyter Notebook. Notebooks, courses, and other links. (First posted in 2016.)
mastering-emacs-in-one-year-guide
Be great at emacs in one year
smartparens
Minor mode for Emacs that deals with parens pairs and tries to be smart about it.
youtube-viewer
Lightweight YouTube client for Linux
NetFPGA-public
NetFPGA public repository
Devel--Cover
Code coverage metrics for Perl
perl-scripts
useful perl script and snippets of code.
sva_traces
Traces for SVA - SystemVerilog Assertions; Will use Go2UVM package to write traces and use uvm_report_mock to predict errors
SV-for-Design
Systemverilog Design Packages
FPGA-RISC-MCU
Simple RISC MCU written on Verilog and Compiler for that MCU.
ARM-pipelined-processor-core-Verilog-
ARM pipelined processor core ( Verilog )
Low-Speed-Controllers
I2C, SPI, UART memory bridge
8-bit-Microprocessor
8-bit microprocessor using Verilog
hlfsm-synth
A compiler from a C-like language to FSMs in Verilog
FFT-Computation
Fast Fourier Transform (FFT) algorithm computes the discrete Fourier transform (DFT) of a sequence, or its inverse (IFFT)
SDRAM-Controller
EDEC STANDARD Double Data Rate (DDR) SDRAM Specification
Lz1_32bits_RISC_CPU
Basic RISC 32 bits CPU
Candy_Crush_Verilog
A modified version of the popular game Candy Crush in Verilog. This is programed for a Nexsys 3 Spartan 6 FPGA with a VGA connection. You can compile all these files in Xilinx and upload the bit file to program into an FPGA