minhhn2910 / FPGA-RISC-MCU

Simple RISC MCU written on Verilog and Compiler for that MCU.

This project's purpose is to design a RISC MCU by Verilog. The code is sucessfully tested on Altera DE2 Board.
We also introduce the compiler for our new MCU, which is written in C.

At this time, the report and project proposal only have the Vietnamese version.

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Simple RISC MCU written on Verilog and Compiler for that MCU.

Languages

Language:Verilog 68.7%Language:VHDL 24.9%Language:C++ 5.9%Language:Scilab 0.5%