Antoine van Gelder (antoinevg)

antoinevg

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Company:@greatscottgadgets

Location:Robertson, South Africa

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greatscottgadgets

Antoine van Gelder's starred repositories

deskhop

Fast Desktop Switching Device

Language:CLicense:GPL-3.0Stargazers:5924Issues:48Issues:77

littlefs

A little fail-safe filesystem designed for microcontrollers

Language:CLicense:BSD-3-ClauseStargazers:4854Issues:150Issues:745

verilog-ethernet

Verilog Ethernet components for FPGA implementation

Language:VerilogLicense:MITStargazers:1961Issues:113Issues:153

htmz

html with targeted manipulation zones

Language:JavaScriptLicense:NOASSERTIONStargazers:1612Issues:16Issues:13

dawproject

Open exchange format for DAWs

Language:HTMLLicense:MITStargazers:726Issues:23Issues:54

lilos

A wee async RTOS for Cortex-M

Language:RustLicense:MPL-2.0Stargazers:629Issues:13Issues:9

milliForth

A FORTH in 340 bytes — the smallest real programming language ever as of yet.

Language:ForthLicense:MITStargazers:442Issues:8Issues:11

rv003usb

CH32V003 RISC-V Pure Software USB Controller

xpcspy

Bidirectional XPC message interception and more. Powered by Frida

Language:TypeScriptLicense:Apache-2.0Stargazers:368Issues:11Issues:3

aes67-monitor

AES67 Stream Monitor: Monitor AES67 streams directly

Language:JavaScriptLicense:MITStargazers:232Issues:14Issues:9

JLC2KiCad_lib

JLC2KICAD_lib is a python script that generate a component library (schematic, footprint and 3D model ) for KiCad from the JLCPCB/easyEDA library.

Language:PythonLicense:MITStargazers:209Issues:10Issues:57

tex-oberon

Make Project Oberon Pretty Again

Language:TeXLicense:NOASSERTIONStargazers:185Issues:7Issues:4

eurorack-pmod

A eurorack-friendly audio frontend compatible with many FPGA boards.

Language:SystemVerilogLicense:NOASSERTIONStargazers:164Issues:6Issues:13

nusb

A new pure-Rust library for cross-platform low-level access to USB devices.

Language:RustLicense:Apache-2.0Stargazers:138Issues:12Issues:18

filament

Fearless hardware design

Language:VerilogLicense:MITStargazers:132Issues:7Issues:175

manta

A configurable and approachable tool for FPGA debugging and rapid prototyping.

Language:PythonLicense:GPL-3.0Stargazers:97Issues:4Issues:12

checklist

How I start Haskell.

jt51

YM2151 clone in verilog. FPGA proven.

Language:VHDLLicense:GPL-3.0Stargazers:75Issues:9Issues:21

edge-net

async + no_std + no-alloc implementations of various network protocols

Language:RustLicense:Apache-2.0Stargazers:68Issues:3Issues:4

IKAOPM

A BSD-licensed YM2151 cycle-accurate Verilog core based on the die shot from siliconpr0n

Language:VerilogLicense:BSD-2-ClauseStargazers:61Issues:9Issues:6

FazyRV

A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.

Language:SystemVerilogStargazers:60Issues:7Issues:0

inferno-rpi

This is compilation of Labs “Porting Inferno OS to Raspberry Pi”. We decided to organize it as some set of small labs with very detailed steps of what is done to reach results and make everything easy to reproduce.

verilog-vcvrack

An example of simulating Verilog / FPGA gateware inside a VCV Rack plugin.

Language:PythonStargazers:22Issues:0Issues:0

embedded-midi

Musical instruments digital interface for rust embedded HAL

Language:RustLicense:Apache-2.0Stargazers:22Issues:2Issues:3

geyserwise_max_iot

Geyserwise max IoT panel with Wifi and MQTT communication.

Language:C++Stargazers:12Issues:0Issues:0

mmmsegui

Multi-segment curve editor/object for Max/MSP

Language:MaxLicense:BSD-2-ClauseStargazers:11Issues:0Issues:0

inet-mbh

The Modular Board Holder design for the inet-nm from the INET working group

License:MITStargazers:3Issues:8Issues:0

embedded-midi

Musical instruments digital interface for rust embedded HAL

Language:RustLicense:Apache-2.0Stargazers:1Issues:1Issues:0