Alex Forencich (alexforencich)

alexforencich

Geek Repo

Company:UC San Diego

Location:La Jolla, CA

Home Page:http://www.alexforencich.com/

Github PK Tool:Github PK Tool


Organizations
corundum
fpganinja
LabPy
SEDS-Software
ucsdsysnet

Alex Forencich's repositories

verilog-ethernet

Verilog Ethernet components for FPGA implementation

Language:VerilogLicense:MITStargazers:2013Issues:113Issues:155

verilog-axi

Verilog AXI components for FPGA implementation

Language:VerilogLicense:MITStargazers:1367Issues:52Issues:67

verilog-pcie

Verilog PCI express components

Language:VerilogLicense:MITStargazers:1028Issues:50Issues:48

verilog-axis

Verilog AXI stream components for FPGA implementation

Language:PythonLicense:MITStargazers:693Issues:47Issues:21

verilog-i2c

Verilog I2C interface for FPGA implementation

Language:VerilogLicense:MITStargazers:497Issues:34Issues:9

verilog-uart

Verilog UART

Language:VerilogLicense:MITStargazers:392Issues:23Issues:10

cocotbext-axi

AXI interface modules for Cocotb

Language:PythonLicense:MITStargazers:197Issues:13Issues:65

verilog-lfsr

Fully parametrizable combinatorial parallel LFSR/CRC module

Language:PythonLicense:MITStargazers:130Issues:13Issues:4

cocotbext-pcie

PCI express simulation framework for Cocotb

Language:PythonLicense:MITStargazers:129Issues:10Issues:16

verilog-wishbone

Verilog wishbone components

Language:PythonLicense:MITStargazers:104Issues:16Issues:5

verilog-cam

Verilog Content Addressable Memory Module

Language:VerilogLicense:MITStargazers:97Issues:12Issues:5

verilog-dsp

Verilog digital signal processing components

Language:PythonLicense:MITStargazers:88Issues:6Issues:0

corundum

Open source FPGA-based NIC and platform for in-network compute

Language:VerilogLicense:NOASSERTIONStargazers:53Issues:7Issues:0

cocotbext-eth

Ethernet interface modules for Cocotb

Language:PythonLicense:MITStargazers:51Issues:8Issues:4

xfcp

Extensible FPGA control platform

Language:VerilogLicense:MITStargazers:51Issues:10Issues:7

pin-uart

FPGA board-level debugging and reverse-engineering tool

Language:TclStargazers:29Issues:5Issues:0

cocotbext-i2c

I2C models for cocotb

Language:PythonLicense:MITStargazers:25Issues:5Issues:2
Language:VerilogLicense:MITStargazers:25Issues:7Issues:0

cocotbext-uart

UART models for cocotb

Language:PythonLicense:MITStargazers:22Issues:6Issues:4

python-hpgl

Python HPGL parsing library

Language:PythonLicense:MITStargazers:18Issues:6Issues:4

cocotb-test

Unit testing for cocotb

Language:PythonLicense:BSD-2-ClauseStargazers:7Issues:2Issues:0

cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

Language:PythonLicense:BSD-3-ClauseStargazers:5Issues:2Issues:0

vcu118_fmcp_qsfp

VCU118 + http://www.hitechglobal.com/FMCModules/x6QSFP28.htm

Language:VerilogStargazers:4Issues:2Issues:0

verilator

Verilator open-source SystemVerilog simulator and lint system

Language:C++License:LGPL-3.0Stargazers:3Issues:2Issues:0

cocotb-bus

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

Language:PythonLicense:NOASSERTIONStargazers:1Issues:2Issues:0

scapy

Scapy: the Python-based interactive packet manipulation program & library. Supports Python 2 & Python 3.

Language:PythonLicense:GPL-2.0Stargazers:1Issues:2Issues:0
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RawTherapee

A powerful cross-platform raw photo processing program

Language:C++License:GPL-3.0Stargazers:0Issues:2Issues:0

typer

Typer, build great CLIs. Easy to code. Based on Python type hints.

Language:PythonLicense:MITStargazers:0Issues:2Issues:0