Sat J. Patel (Satjpatel)

Satjpatel

Geek Repo

Company:Texas A&M University

Location:College Station/Gandhinagar

Home Page:https://sites.google.com/view/satpatel/home

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Sat J. Patel's repositories

Verilog-HDL-Useful-Codes

Useful Verilog HDL Codes which can be used in multiple design systems.

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MIPS32

Basic implementation of MIPS32

4x4-Multiplier

Verilog HDL code for 4x4 multiplier

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aes

C++ implementation of a 128-bit AES encryption/decryption tool.

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Automatic-Food-Counter-using-Verilog-HDL-

A Verilog HDL Code for an automatic food cooker

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Digital-Image-Watermarking-and-Its-FPGA-Implementation

My seminar topic as a part of BTech course in ECE. I would be first implementing different schemes of frequency domain watermark embedding and then implement the best one on FPGA.

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DSA---CPP-and-Python

All impirtant Data Structures for coding in Python

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DSP-Stuff

Useful MATLAB Codes

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Fp16_Arithmetic_modules

FP16_Arithmetic modules designed by Verilog and VHDL

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NeuralNetworkOnFPGA

An initial proof of concept for neural network on FPGA

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pdr

A repo for a Program and Data Representation university-level course

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Programmable-Logic-Block-for-Peripheral-Device-

A Verilog Code to mimic the functionality of the 8255 Interfacing Integrated Circuit

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RISCKY-Business

SV Implementation of RISC V ISA

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SoonChowkdi

A Tic Tac Toe game

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UVMPractice

UVM Practice on my own on a Small ALU

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VHDL-Useful-Codes

Over the course of my learning, I made some simple but useful VHDL codes, which can be helpful for bigger, more complex projects, and for those who are just beginning in the world of VHDL.

zipcpu

A small, light weight, RISC CPU soft core

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Branch-Predictor-Project

Done as a part of CSE-614: Computer Architecture

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AsyncFIFO

An SV implementation of Asynchronous FIFO

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DSP-Project

RTL Design and Verification - with AXI-Lite Compatible Memory

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FIR-Filter-Design-in-SystemVerilog

A generic FIR filter implementation in System Verilog, and verified with Cocotb

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GURUKUL

Smart Class Projector Ecosystem - Swadeshi Microprocessor Challenge

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Implementation-and-Comparison-of-GHB-Based-Stride-Prefetcher-Feedback-Directed-Prefetching-and-a-C

Done as a part of coursework for ECEN-676 (Advanced Computer Architecture) at Texas A&M, Spring 2023

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Intelligent-Traffic-Light-Control-System-

A Verilog HDL Code for an Intelligent Traffic Light Control System ( Using State Machines)

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it-cert-automation-practice

Google IT Automation with Python Professional Certificate - Practice files

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Satjpatel

Config files for my GitHub profile.

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Technical-Articles

Contains all my written technical articles

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Tomasulo-s-Algorithm

A C++ Implementation of Tomasulo's Algorithm

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