OpenEDF

verilog-basic

learn the combinational and sequential logic circuit.

practices-test

practices and test

linux-stack

Linux driver and unix env programming

oh

Verilog library for ASIC and FPGA designers

openedf

Embedded development framework.

basic_verilog

Must-have verilog systemverilog modules

e203_hbirdv2

The Ultra-Low Power RISC-V Core

hdl

HDL libraries and projects

macan

risc-v soft core soc

no-OS

Software drivers in C for systems without an operating system

wujian100_open

IC design and development should be faster，simpler and more reliable

DeepLearningExamples

Deep Learning Examples

e200_opensource

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

kianRiscV

kianv a simple implementation of a rv32im riscv cpu and soc in verilog with firmware that runs raytracer, mandelbrot, etc.....

linux

Linux kernel source tree

Linux-Device-Drivers-Development

Linux Device Drivers Development, published by Packt

linux-on-litex-vexriscv

Linux on LiteX-VexRiscv

linux_driver_tutorials

This Directory contains the tutorials posted in www.embetronicx.com

lkmpg

The Linux Kernel Module Programming Guide (updated for 5.x kernels)

NutShell

RISC-V SoC designed by students in UCAS

openc910

OpenXuantie - OpenC910 Core

opene902

OpenXuantie - OpenE902 Core

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

riscv-tests

u-boot

"Das U-Boot" Source Tree

verilog-pcie

Verilog PCI express components

VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

xunzi

xunzi is a open sources RTOS.

xv6-public

xv6 OS

xv6-riscv

Xv6 for RISC-V