OpenEDF

Macro's repositories

verilog-basic

learn the combinational and sequential logic circuit.

Language:SystemVerilogGPL-3.017 10

linux-stack

Linux driver and unix env programming

Language:CMIT3 10

oh

Verilog library for ASIC and FPGA designers

Language:VerilogMIT300

practices-test

practices and test

Language:CApache-2.03 10

algorithm

Algorithm Source test.

Language:CGPL-2.02 10

openedf

Embedded development framework.

Language:CApache-2.02 10

openhw-lib

PCB Design sources

Language:PascalGPL-3.02 10

e203_hbirdv2

The Ultra-Low Power RISC-V Core

Language:CApache-2.0100

macan

risc-v soft core soc

Language:VerilogMIT1 10

no-OS

Software drivers in C for systems without an operating system

Language:CNOASSERTION100

wujian100_open

IC design and development should be faster，simpler and more reliable

Language:VerilogMIT100

broadcom-bcmdhd-4359

GPL Broadcom driver for bcm4359 / AP6398S

000

ceva_wifi6

ceva wifi6 rtl ip

Language:Verilog000

e200_opensource

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

Language:VerilogApache-2.0000

linux

Linux kernel source tree

Language:CNOASSERTION000

linux_driver_tutorials

This Directory contains the tutorials posted in www.embetronicx.com

Language:C000

mhome

risc-v core

Language:CGPL-3.0010

mwifiex

WiFi extensions

Language:CGPL-2.0000

riscv-tests

Language:CNOASSERTION000

u-boot

"Das U-Boot" Source Tree

Language:C000