Florent's starred repositories
UVVM
UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/
fpga_readings
Recipe for FPGA cooking
display_controller
FPGA display controller with support for VGA, DVI, and HDMI.
vhdl-style-guide
Style guide enforcement for VHDL
cocotb-coverage
Functional Coverage and Constrained Randomization Extensions for Cocotb
SpaceWireToGigabitEther
Open-source version of SpaceWire-to-GigabitEther using ZestET1
zynq-ultrascale-readback-capture
This document adopts the method from the XAPP1230 for doing readback capture on Xilinx UltraScale devices and shows how to migrate the same task to Zynq UltraScale+ MPSoC with several noticeable differences.