IlyaChichkov / Verilog_Labs_2023

Verilog & C Language practice

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Verilog & C Language practice


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Language:SystemVerilog 65.1%Language:C 13.1%Language:Tcl 6.5%Language:Assembly 5.7%Language:Verilog 3.5%Language:VHDL 2.6%Language:Shell 1.3%Language:JavaScript 0.7%Language:HTML 0.7%Language:Makefile 0.3%Language:Stata 0.2%Language:C++ 0.2%Language:Python 0.1%Language:Batchfile 0.0%Language:Forth 0.0%Language:Pascal 0.0%Language:PureBasic 0.0%