Glbert

Glbert

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linux

Linux kernel source tree

Language:CLicense:NOASSERTIONStargazers:175013Issues:7957Issues:0

source-code-pro

Monospaced font family for user interface and coding environments

Language:CSSLicense:OFL-1.1Stargazers:19747Issues:614Issues:246

the-economist-ebooks

经济学人(含音频)、纽约客、自然、新科学人、卫报、科学美国人、连线、大西洋月刊、国家地理等英语杂志免费下载,支持epub、mobi、pdf格式, 每周更新.

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LLMSurvey

The official GitHub page for the survey paper "A Survey of Large Language Models".

org-roam

Rudimentary Roam replica with Org-mode

Language:Emacs LispLicense:GPL-3.0Stargazers:5396Issues:98Issues:1301

yasnippet

A template system for Emacs

auto-complete

Emacs auto-complete package

Language:Emacs LispLicense:NOASSERTIONStargazers:1719Issues:103Issues:339

corundum

Open source FPGA-based NIC and platform for in-network compute

Language:VerilogLicense:NOASSERTIONStargazers:1563Issues:88Issues:155

Mojave-gtk-theme

Mojave is a macos Mojave like theme for GTK 3, GTK 2 and Gnome-Shell

Language:SCSSLicense:GPL-3.0Stargazers:1475Issues:35Issues:215

smex

A smart M-x enhancement for Emacs.

intel-cmt-cat

User space software for Intel(R) Resource Director Technology

Language:CLicense:NOASSERTIONStargazers:684Issues:70Issues:209

News-Record

目前主要维护经济学人【The Economist】、纽约客【The NewYorker】和时代杂志【Time】

core_ddr3_controller

A DDR3 memory controller in Verilog for various FPGAs

vim-plugin-dev-guide

Vim 插件开发指南

Language:HTMLLicense:CC-BY-SA-4.0Stargazers:311Issues:11Issues:3

AMBA_APB_SRAM

AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).

Language:SystemVerilogLicense:MITStargazers:143Issues:4Issues:0

chiselverify

A dynamic verification library for Chisel.

Language:ScalaLicense:BSD-2-ClauseStargazers:137Issues:12Issues:13
Stargazers:93Issues:0Issues:0

DDR2_Controller

DDR2 memory controller written in Verilog

Language:VerilogStargazers:68Issues:9Issues:0

DDR4MemoryController

HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.

Language:SystemVerilogLicense:MITStargazers:63Issues:2Issues:0

NoC-Verilog

A verilog implementation for Network-on-Chip

axi4_vip

Verification IP for APB protocol

Language:SystemVerilogLicense:Apache-2.0Stargazers:54Issues:0Issues:0

The-Economist-Audio-Downloader

The Economist Audio Edition Downloader for Advanced English Learners

Language:CLicense:EPL-2.0Stargazers:43Issues:4Issues:3

easyUVM

A simple UVM example with DPI

Language:SystemVerilogLicense:MITStargazers:34Issues:4Issues:1

UVM-APB_RAL

This repository contains an example of the use of UVM Register Abstraction Layer in a verification of a simple APB DUT.

Language:SystemVerilogLicense:MITStargazers:33Issues:0Issues:0

SCFTGU_BOOK

Archives of SystemC from The Ground Up Book Exercises

License:NOASSERTIONStargazers:26Issues:0Issues:0

SoC-Design-DDR3-Controller

DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog

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apb_vip

Verification IP for APB protocol

Language:SystemVerilogLicense:Apache-2.0Stargazers:20Issues:0Issues:0

APB-SPI-Controller-Verification

UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC24xx microcontroller specification.

Language:SystemVerilogStargazers:7Issues:0Issues:0