FrancescoConti / riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

RISC-V Cores and SoC Overview

This document captures the status of various cores and SoCs that endeavor to implement the RISC-V specification. Note that none of these cores/SoCs have passed the in-development RISC-V compliance suite.

Please add to the list and fix inaccuracies.

Cores

Name	Links	Priv. spec	User spec	License	Supplier
rocket	GitHub	1.11-draft	2.3-draft	BSD	SiFive, UCB Bar
freedom	GitHub	1.11-draft	2.3-draft	BSD	SiFive
Berkeley Out-of-Order Machine (BOOM)	GitHub	1.11-draft	2.3-draft	BSD	Esperanto, UCB Bar
ORCA	GitHub		RV32IM	BSD	VectorBlox
RI5CY	GitHub		RV32IMC	Solderpad Hardware License v. 0.51	ETH Zurich, Università di Bologna
Zero-riscy	GitHub		RV32IMC	Solderpad Hardware License v. 0.51	ETH Zurich, Università di Bologna
Ariane	Website,GitHub		RV64IMC	Solderpad Hardware License v. 0.51	ETH Zurich, Università di Bologna
Riscy Processors	Website,GitHub			MIT	MIT CSAIL CSG
RiscyOO	GitHub	1.10	RV64IMAFD	MIT	MIT CSAIL CSG
Minerva	GitHub	1.10	RV32I	BSD	LambdaConcept
OPenV/mriscv	GitHub		RV32I(?)	MIT	OnChipUIS
VexRiscv	GitHub		RV32I[M][C]	MIT	SpinalHDL
Roa Logic RV12	GitHub	1.9.1	2.1	Non-Commercial License	Roa Logic
SCR1	GitHub	1.10	2.2, RV32I/E[MC]	Solderpad Hardware License v. 0.51	Syntacore
Hummingbird E200	GitHub	1.10	2.2, RV32IMAC	Apache 2.0	Bob Hu
Shakti	Website,GitLab	1.11	2.2, RV64IMAFDC	BSD	IIT Madras
ReonV	GitHub			GPL v3
PicoRV32	GitHub		RV32I/E[MC]	ISC	Clifford Wolf
MR1	GitHub		RV32I	Unlicense	Tom Verbeure
SERV	GitHub		RV32I	ISC	Olof Kindgren
SweRV EH1	GitHub		RV32IMC	Apache 2.0	Western Digital Corporation
Reve-R	GitHub	1.10	RV32IMAC	Apache 2.0	Gavin Stark

SoC platforms

Name	Links	Core	License	Supplier
Rocket Chip	GitHub,Simulator	Rocket	BSD	SiFive, UCB BAR
LowRISC	GitHub	RV32IM	BSD	LowRISC CIC
PULPino	Website,GitHub	RI5CY, Zero-riscy	Solderpad Hardware License v. 0.51	ETH Zurich, Università di Bologna
PULPissimo	Website,GitHub	RI5CY, Zero-riscy	Solderpad Hardware License v. 0.51	ETH Zurich, Università di Bologna
OPENPULP	Website,GitHub	RI5CY, Zero-riscy	Solderpad Hardware License v. 0.51	ETH Zurich, Università di Bologna
HERO	Website,GitHub	RI5CY, Zero-riscy	Solderpad Hardware License v. 0.51	ETH Zurich, Università di Bologna
OpenPiton + Ariane	Website,GitHub	Ariane	BSD	Princeton Parallel Group
Briey	GitHub	VexRiscv	MIT	SpinalHDL
Riscy	GitHub	RV64I	MIT	AleksandarKostovic
Raven	GitHub	PicoRV32	ISC	RTimothyEdwards, mkkassem (efabless.com)
PicoSoC	GitHub	PicoRV32	ISC	Clifford Wolf
Icicle	GitHub	RV32I	ISC	Graham Edgecombe

SoCs

Include a chip if it has been fabricated and is either available for sale, available for preorder, or running production workloads internally, and if it has at least one RISC-V hard core (no FPGAs, but non-"SoC" products with controller cores are allowed).

Name	Supplier	Core	ISA	Devkit	Availability	Links
FE310-G000	SiFive	E31	RV32IMAC	HiFive1	public since 2016Q4	Datasheet
FE310-G002	SiFive	E31	RV32IMAC	HiFive1 Rev B	announced 2019Q1, available for preorder	Product page
Freedom U540	SiFive	U54 (4 cores), E51 (1 management core)	RV64GC (application cores), RV64IMAC (management core)	HiFive Unleashed development board	public since 2018Q1	Product page
GAP8	GreenWaves Technologies	PULP / 1 + 8 RI5CY	RV32IMC (+ Priviledged and custom ISA extensions)	GAPuino development board	public since 2018Q1	Product page
K210	Kendryte	K210	RV64GC	KD233 development board, Sipeed MAIX/M1 development boards	public since 2018Q4	Product page, Datasheet, GitHub
RV32M1	NXP	RI5CY + Zero RI5CY + Arm Cortex M4F + Arm Cortex M0+	RV32IMC	VEGAboard	available for preorder as of 2018Q4	Reference Manual and Datasheet
RavenRV32	efabless	PicoRV32	RV32IMAC	RavenRV32 DevKit	Limited Quantity	Datasheet, GitHub