FrancescoConti

riscv

nemo

NEural Minimizer for pytOrch

plinio

A Plug-and-play Lightweight tool for the Inference Optimization of Deep Neural networks

pulp-sdk

training-mixed-precision-quantized-networks

This repository containts the pytorch scripts to train mixed-precision networks for microcontroller deployment, based on the memory contraints of the target device.

APAI_LAB03_Support

box64

Box64 - Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices

CFWosh.github.io

dory

FIRnotebook

FrontNetPorting

Port face-following capabilities to the PULP-shield, and run it on the Crazyflie 2.0

hdlparse

Simple parser for extracting VHDL documentation

hsdes_mcu_conv_parallel_template

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

ibex-tb

A simple testbench for ibex for educational purposes (forked from hwpe-tb)

lfsr32

lfsr32CheckL1

nemo_examples_helper

Helper repository for NEMO examples

pact_from_paper

pulp

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

pulp-actions

pulp_cluster

The multi-core cluster of a PULP system.

pulpissimo

This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

pytorch_resnet_cifar10

Proper implementation of ResNet-s for CIFAR10/100 in pytorch that matches description of the original paper.

riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

svprettyplot

symbolator

HDL symbol generator

tracevis

TutorialHelper

vicreg

Copied (no fork) from main facebookresearch/vicreg repo